Avoid Throwing Your Design Over the Wall
Not Every PCB Shops Are Created Equal
- Define migration path from Prototypes to Final Fabrication and approve stack-up with Final Fabrication site(s)
- Design in accordance with Standard Capability DFM guidelines
- Using a symmetric (or balanced) stack-up is the most important step that can be taken to ensure that no warpage or residual stresses are present in the final product.
- The build should be symmetrical about the z-axis, including copper, prepregs and cores.
- Either core or prepreg or copper is thicker at one side only
- Unbalanced copper thickness on a core is feasible only when difference is small (i.e. 0.5oz and 1oz)
- Still need to keep overall stack-up balanced
- Keep it simple
- Mechanically drilled holes cannot be overlapped
- Also need to consider balancing
- Do NOT stack laser vias over buried vias – high reliability risk!
- Use staggered vias instead
- Very high chance of separation after Thermal Stress or Reflow
- IPC Class 2 specification allows up to 900 hole break-out.
- In order to improve manufacturing yield, ‘tear drops’ shall be add to the
trace / pad junction.
Copper Balancing (Thieving)
- Avoid having unbalanced pattern
on inner layer. Otherwise, there is
a risk of creating a low pressure
area during lamination. It is
recommended to add dummy
copper feature to facilitate
DHS vs FHS
- Designers mostly care about Finished Hole Size (FHS) but…. PCBs only care about Drill Hole Size (DHS)
- DHS is used in design rule considerations:
– Hole to copper distance
– Hole (wall) to hole (wall) distance for CAF
– Annular ring
– Plating aspect ratio
- Typically, DHS = FHS + 4mil (100um) but can range from + 3mil (75um) to + 6mil (150um) depending on aspect ratio, copper thickness, etc.
- Suggest FHS tolerance to be + 3mil (75um) / – Hole Size
Press Fit Holes
- When dealing with press-fit holes, it is best to specify FHS (with its tolerance, which is usually +/-2mil) only.
- Some press-fit connector manufacturers may also specify the drill size, surface finish, and copper plating thickness within specific tolerances. But due to actual board design, such conditions may not be realistic.
Just Follow the Stack-up Exactly!
- Basically ok (if no impedance involved) BUT…
- Availability of Resin Content (and sometimes Glass Style) maybe different from region to region
- If impedance required, then need to consider different Dk values. TTM uses internal Dk values for most of existing materials (rather than databank) to get more accurate simulation
- Upper trace width will vary from site to site depending on the process setup
- Also, soldermask type and coating thickness will affect impedance
Cerra Systems is one of the leading PCB manufacturing solutions providers with PCB manufacturing plants located in North America, Asia with certifications for MIL, AS, TS, ISO, & NADCAP. Our products are Rigid, Flex, Rigid-flex, HDI, RF, and hybrid PCBs addressing up to 64 layers and 2 mil technology. Cerra Systems Major PCB Market is Aerospace, defense, Medical, computing, cellular & Industrial. Microvias PCB in India
For more information, visit- http://cerrasystems.com/pcb-fabrication/