ProASIC3 Starter Kit

A3PE1500 ProASIC3 Starter Kit FPGA Evaluation Board


A3PE1500 ProASIC3 FPGA Evaluation Board

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Product Description

ProASIC3 Starter Kit

Microsemi’s ProASIC3 Starter Kit is a complete kit that includes a ProASIC3 starter kit board a Libero Silver software license and a FlashPro4 programmer. The board is socketed and is populated with A3PE1500 silicon. Any device in the ProASIC3 family in the PQ208 package may be placed into the socket. The following key features are supported:

On-board voltage regulation
Advanced FlashROM capabilities
Four high-speed LVDS channels with a ProASIC3E device or two LVDS channels with a ProASIC3 device
Programming headers

Kit Contents- A3PE-STARTER-KIT-2

1 Starter kit board with an A3PE1500-PQ208
1 FlashPro4 programmer
1 9 V power supply
1 Quickstart Card

Evaluation board with a ProASIC3 A3PE1500-PQ208 FPGA

Eight I/O banks for ProASIC3E (six for ProASIC3):
Two can be independently set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V (one for ProASIC3)
Four are fixed at 3.3 V (applies to ProASIC3)
Two fixed at 2.5 V (applies to ProASIC3E only)
Clocks: Oscillator for system clock and manual clock option are provided
Eight LEDs and four switches: Provide simple inputs and outputs to the system
Two CAT5E RJ45 connectors for high-speed LVDS communications
Two programming headers: Support in-system programming (ISP) of single and JTAG-chained boards using FlashPro4

The ProASIC3/E Starter Kit board consists of the following:

• Wall mount power supply connector, with a switch and a LED indicator
• Switches to select from among 1.5 V, 1.8 V, 2.5 V, and 3.3 V — I/O voltages on banks 4 and 5
(southern side)
• 10-pin 0.1 inch pitch programming connector compatible with Altera connections
• 40 MHz oscillator and two independent manual clock options for global reset and pulse
• Eight LEDs (driven by outputs from the device)
• Jumpers (allow disconnection of all external circuitry from the FPGA)
• Two mono stable pulse generator switches (global and reset)
• Four switches (provide input to the device)
• Two hex switches to provide four inputs each to the FPGA, and which are set to a user-switchable
hexadecimal input value


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